Elon Musk said Tesla is reducing the memory capacity planned for its AI5 and AI6 chips as the company prepares the processors for large-scale production. AI5 will now use 72 GB of LPDDR5 instead of the previously planned 144 GB, while AI6 is expected to carry 144 GB of LPDDR6.
Musk said the reduced memory specifications will not affect the performance of Tesla’s Optimus humanoid robot. Tesla plans to use the AI5 and AI6 chips in both its Full Self-Driving compute systems and Optimus.
AI5 uses a half-reticle design with a large central compute die surrounded by 12 DRAM modules. The chip is expected to be manufactured by TSMC and Samsung using 2nm processes and deliver between 2,000 and 2,500 TOPS of performance.
The single-chip version is expected to offer performance roughly comparable to Nvidia’s H100, while a dual-chip configuration is intended to compete with Blackwell-based systems. Trial production is already underway at Samsung’s Taylor facility in Texas, with volume production expected in 2027.
Tesla also plans to use TSMC and Samsung for AI6 and AI6.5. Those designs are expected to rely heavily on SRAM, with Musk previously saying that roughly half of their TRIP AI compute accelerators are dedicated to SRAM. He said this allows calculations held in SRAM cache to access effective memory bandwidth about an order of magnitude higher than DRAM.
The reduction comes as memory supply remains constrained. Micron recently estimated that each humanoid robot could eventually require around 200 GB of DRAM and several terabytes of NAND storage, and said physical AI could become a major source of memory and storage demand by the end of the decade.
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